There are a few different tracks here. One is software optimizations where models require less energy to use. That’s been moving really fast over the past few years, and there are still a lot of papers that haven’t been integrated into production systems that are really promising.
Another track is hardware architecture where the substrate stays the same, but chip design improves. A general example of this is SoC architecture like M series from Apple of Kirin 9000 from Huawei. The architecture eliminates the memory bus which is one of the main bottlenecks, and RISC instruction set facilitates parallelism much better than SISC. A more specific example would be ASIC chips like what Taalas is making which print the model directly on the chip.
And the last track is the one you mention with using a more efficient substrate. Notably this will directly benefit from the other two tracks as well. Whatever software and hardware architecture improvements people come up with, will directly apply to chips made out of graphene or other materials.
I expect so as well, and China also has a lot of incentive to invest in alternative substrates since they’re behind on silicon. If one of these moonshot projects they’re pursuing delivers that would make current silicon chips look like vacuum tubes by comparison.
There are a few different tracks here. One is software optimizations where models require less energy to use. That’s been moving really fast over the past few years, and there are still a lot of papers that haven’t been integrated into production systems that are really promising.
Another track is hardware architecture where the substrate stays the same, but chip design improves. A general example of this is SoC architecture like M series from Apple of Kirin 9000 from Huawei. The architecture eliminates the memory bus which is one of the main bottlenecks, and RISC instruction set facilitates parallelism much better than SISC. A more specific example would be ASIC chips like what Taalas is making which print the model directly on the chip.
And the last track is the one you mention with using a more efficient substrate. Notably this will directly benefit from the other two tracks as well. Whatever software and hardware architecture improvements people come up with, will directly apply to chips made out of graphene or other materials.
Agreed and all of those w tracks to squeeze out as much as we can from silicon.
There’s a limit that we haven’t yet reached but we will eventually because of those profits.
I bet that China will be the first to reach it since they’re willing to spend so much on all infrastructure.
I expect so as well, and China also has a lot of incentive to invest in alternative substrates since they’re behind on silicon. If one of these moonshot projects they’re pursuing delivers that would make current silicon chips look like vacuum tubes by comparison.